Project 2: Wien Bridge Sinusoidal Oscillator

Project 2: Wien Bridge Sinusoidal Oscillator

Objective:

To design and demonstrate basic operation of a Wien bridge oscillator

Introduction:

An oscillator is a circuit that converts a DC input into and AC output. This project investigates sinusoidal output oscillator. This consists of an operational amplifier in positive feedback loop with frequency selective RC network. The output frequency of the oscillator is determined by the frequency selective network. The criteria of oscillation is magnitude of loop gain equal to unity and phase of loop gain equal to zero at the frequency of oscillation.

Design procedure:

First Wien bridge oscillator without amplitude stabilization is designed. The schematic of the circuit is shown below-

Summary of Image: A schematic diagram of a Wien bridge oscillator circuit using a uA741 operational amplifier, resistors (R, R1, R2), and capacitors (C, C). Power supplies are shown as +15Vdc and -15Vdc. The output is labeled V out.

The frequency of oscillation is given by-

$f_o = rac{1}{2 au RC}$

The given specification is for frequency between 1.9-2.1KHz, then taking $f_o = 2KHz$ and capacitor of $C = 100nF$ we get the value of resistor is-

$R = rac{1}{2 au f_o C} = 795.7 au$

Loop gain is given by $A = 1 + R_2/R_1$, for oscillation in wien bridge oscillator we need loop gain of 3 then –

$rac{R_2}{R_1} = 2$

Taking $R_1 = 5K au$, we need $R_2 = 10K au$ for oscillation.

Same circuit values can be used for Wien bridge oscillation with amplitude stabilization using diodes.

Pspice Simulation:

The schematic of Wien bridge oscillator is shown below-

Summary of Image: A schematic diagram of a Wien bridge oscillator circuit for Pspice simulation. It includes a uA741 op-amp, resistors (R1, R2, R3, R4), capacitors (C2, C3), and voltage sources (V1, V2). Component values are labeled, including R1=795.7, C2=100n, R2=795.7, C3=100n, R3=10k, R4=5k, V1=15V, V2=-15V. Node voltages are also shown.

The output waveform of the oscillator is-

Summary of Image: A plot showing the output voltage waveform (V(R1:2)) over time from a Pspice simulation. The waveform appears somewhat square-like or clipped, oscillating around 0V with peaks reaching approximately +/- 13V. The x-axis is time in milliseconds, and the y-axis is voltage.

Due to non ideal behaviour of the op-amp the period of oscillation is coming to be around 0.8ms or 1.25KHz. This is also due to smaller slew rate of charging and discharging capacitor which also increases the overall period of oscillation. So, modifying the values of resistor $R$ to $500 au$ and keeping the capacitor at $100nF$ the schematic is shown in the next page-

Summary of Image: A schematic diagram of a modified Wien bridge oscillator circuit for Pspice simulation. It is similar to the previous schematic but with R1 and R2 values changed to 500. Other components and values (uA741 op-amp, C2=100n, C3=100n, R3=10k, R4=5k, V1=15V, V2=-15V) are the same. Node voltages are also shown.

The output waveform of the oscillator is-

Summary of Image: A plot showing the output voltage waveform (V(R1:2)) over time from a Pspice simulation of the modified circuit. The waveform is still clipped, oscillating around 0V with peaks reaching approximately +/- 13V. A probe cursor indicates measurements showing a period of around 508.621 microseconds.

The period of oscillation is around 508µs which makes the frequency of oscillation-

$f_o = 1.968KHz$

This frequency is in the given specification range of 1.9-2.1KHz but here output is getting clipped even when loop gain is exactly 2. This is happening due to non ideal effects of uA741 op amp and tolerances of other components which makes the circuit non linear. Amplitude stabilization can be used to make this circuit stable and produce a sine wave.

Next, amplitude stabilized Wien bridge oscillator schematic is created with same values of $R$ and $C$ as-

$R = 800 au$ and $C = 100nF$

Summary of Image: A schematic diagram of an amplitude-stabilized Wien bridge oscillator circuit for Pspice simulation. It includes a uA741 op-amp, resistors (R1, R2, R3, R4, R5), capacitors (C1, C2), voltage sources (V1, V2), and two diodes (D1, D2 - 1N4002). Component values are labeled, including R5=800, C2=0.1u, R4=800, C1=0.1u, R1=10k, R2=10k, R3=6k, V1=15V, V2=-15V. Node voltages are also shown.

The output waveform of the oscillation is shown below-

Summary of Image: A plot showing the output voltage waveform (V(D2:AN)) over time from a Pspice simulation of the amplitude-stabilized circuit. The waveform appears much more sinusoidal compared to the previous simulations, oscillating around 0V with peaks reaching approximately +/- 4.4V. A probe cursor indicates measurements showing a period of around 514.378 microseconds.

From the above waveform it can be seen that period of oscillation is around 514us which make oscillation frequency of $f_o = 1.945KHz$. This is within the given specification.

Post Lab questions:

Wien bridge oscillator is self-starting type using positive feedback with loop gain$ au 1$. In this scenario the circuit amplifies small noise offsets in the circuit to produce sustained sinusoidal oscillations.
The output waveform distorts when loop gain is too high so that output waveform saturates or due to different non linearities in the circuit and op-amp at high amplitudes the output can be distorted.
The basic Wien bridge oscillator needs precise tuning of loop gain to maintain oscillation and it is highly susceptible to distortion as due to different non linearities and tolerances precise gain control is not possible in practical applications.
Stabilized Wien bridge oscillator includes as non-linear element like diode or FET for automatic gain control. This stabilizes the amplitude and reduces distortion.
Both of these topologies work on same principle of feedback.
When the pot is varied the effective resistance of the feedback path is changed which changes the loop gain. If the gain is high then output will get clipped but when its low then oscillation will die out. The pot can be used to tune to current value of feedback resistor.
When amplitude saturates the oscillator does not behave linearly. This distortion introduces harmonics and can change the frequency. Usually frequency decreases due to clipping of output. Non linear elements can be used for feedback control for distortion less output.

Conclusion:

The wien bridge oscillator is working correctly. In the basic wien bridge oscillator due different non ideal effects of the circuit the output was getting saturated but using amplitude stabilization proper sinusoidal output is achieved.

References:

[1] A. S. Sedra and K. C. Smith, Microelectronic Circuits, 7th ed., New York, NY, USA: Oxford University Press, 2015

Project 2 - Wien Sinusoidal Oscillator

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